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| TRIPLE LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR FEATURES s 5V and 3.3V power supplies required s Also, supports LVPECL-to-PECL translation s 500ps propagation delays s Fully differential design s Differential line receiver capability s Application note s Available in 20-pin SOIC package SY100EL92 DESCRIPTION The SY100EL92 is a triple LVPECL-to-PECL or PECLto-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa). SY100EL92 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-toLVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details. VBB outputs are provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the D input and the active signal will drive the D input. When used, the VBB should be bypassed to VCC via a 0.01F capacitor. The VBB is designed to act as a switching reference for the SY100EL92 under single ended input conditions. As a result, the pin can only source/sink 0.5mA of current. To accomplish the PECL-to-LVPECL level translation, the SY100EL92 requires three power rails. The VCC and VCC_VBB supply is to be connected to the standard PECL supply, the 3.3V supply is to be connected to the VCCO supply, and GND is connected to the system ground plane. Both the VCC and VCCO should be bypassed to ground with a 0.01F capacitor. To accomplish the LVPECL-to-PECL level translation, the SY100EL92 requires three power rails as well. The 5.0V supply is connected to the VCC and VCCO pins, 3.3V supply is connected to the VCC_VBB pin and GND is connected to the system ground plane. VCC_VBB is used to provide a proper VBB output level if a single ended input is used. For differential LVPECL input VCC_VBB can be either 3.3V or 5V. Under open input conditions, the D input will be biased at a VCC/2 voltage level and the D input will be pulled to GND. This condition will force the "Q" output low, ensuring stability. PIN CONFIGURATION/BLOCK DIAGRAM VCC_VBB 1 D0 2 D0 3 VBB 4 20 VCC 19 18 17 16 15 14 13 12 11 Q0 Q0 VCCO Q1 Q1 VCCO Q2 Q2 VCC D1 5 D1 6 VBB 7 D2 8 D2 9 GND 10 SOIC TOP VIEW FUNCTION TABLE Function PECL-to-LVPECL LVPECL-to-PECL PECL-to-PECL LVPECL-to-LVPECL Vcc 5.0V 5.0V 5.0V 5.0V Vcco 3.3V 5.0V 5.0V 3.3V Vcc_VBB 5.0V 3.3V 5.0V 3.3V PIN NAMES Pin Dn Qn VBB VCCO VCC_VBB GND VCC Function PECL / LVPECL Inputs PECL / LVPECL Outputs PECL / LVPECL Reference Voltage Output VCC for Output VCC for VBB Output Common Ground Rail VCC for Internal Circuitry Rev.: D Amendment: /0 1 Issue Date: January, 1999 Micrel SY100EL92 PECL INPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = VCC = +4.5V to +5.5V; VCCO = +3.0V to +3.8V TA = -40C Symbol VCC VIH VIL VPP IIH IIL VBB ICC Parameter Power Supply Voltage Input HIGH Input LOW Input Input HIGH Current Input LOW Current Output Reference(1) TA = 0C Min. 4.5 3.835 3.190 TA = +25C Max. 5.5 4.120 3.525 TA = +85C Min. 4.5 3.835 3.190 Min. 4.5 3.835 3.190 Typ. -- -- -- Max. 5.5 4.120 3.515 Typ. -- -- -- Min. 4.5 3.835 3.190 Typ. -- -- -- Max. 5.5 4.120 3.525 Typ. -- -- -- Max. 5.5 4.120 3.525 Unit V V V Voltage(1) Voltage(1) Minimum Peak-to-Peak 150 -- -- -- -- -- -- -- 150 -- -- 3.740 150 -- 0.5 -600 3.620 -- -- -- -- -- -- 150 -- -- 3.740 150 -- 0.5 -600 3.620 -- -- -- -- -- -- 150 -- -- 3.740 150 -- 0.5 -600 3.620 -- -- -- -- -- -- 150 -- -- 3.740 mV A A Dn Dn 0.5 -600 3.620 V mA Power Supply Current -- -- 12 -- -- 12 -- 8.0 12 -- -- 12 NOTE: 1. These levels are for VCC_VBB = 5.0V. Level specifications will vary 1:1 with VCC_VBB. LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = VCC = +4.5V to +5.5V; VCCO = +3.0V to +3.8V TA = -40C Symbol VCCO VOH VOL ICCO Parameter Power Supply Voltage Output HIGH Output LOW Voltage(1) Voltage(1) Min. 3.0 2.215 1.470 -- Typ. -- -- -- -- Max. 3.8 2.420 1.745 20 3.0 2.275 1.490 -- TA = 0C Min. Typ. -- -- -- -- Max. 3.8 3.0 TA = +25C Min. Typ. 3.3 Max. 3.8 3.0 TA = +85C Min. Typ. -- -- -- -- Max. 3.8 2.420 1.680 21 Unit V V V mA 2.420 2.275 2.350 2.420 2.275 1.680 1.490 1.600 1.680 1.490 20 -- 15 20 -- Power Supply Current NOTE: 1. These levels are for VCCO = 3.3V. Level specifications will vary 1:1 with VCCO. LVPECL INPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = +3.0V to +3.8V(1); VCC = VCCO = +4.5V to +5.5V TA = -40C Symbol VCC VIH VIL VPP IIH IIL VBB ICC Parameter Power Supply Voltage Input HIGH Input LOW Input Input HIGH Current Input LOW Current Output Reference(2) TA = 0C Min. 4.5 2.135 1.490 TA = +25C Max. 5.5 2.420 1.825 TA = +85C Min. 4.5 2.135 1.490 Min. 4.5 2.135 1.490 Typ. -- -- -- Max. 5.5 2.420 1.825 Typ. -- -- -- Min. 4.5 2.135 1.490 Typ. -- -- -- Max. 5.5 2.420 1.825 Typ. -- -- -- Max. 5.5 2.420 1.825 Unit V V V Voltage(2) Voltage(2) Minimum Peak-to-Peak 150 -- -- -- -- -- -- -- 150 -- -- 2.04 150 -- 0.5 -600 1.92 -- -- -- -- -- -- 150 -- -- 2.04 150 -- 0.5 -600 1.92 -- -- -- -- -- -- 150 -- -- 2.04 150 -- 0.5 -600 1.92 -- -- -- -- -- -- 150 -- -- 2.04 mV A A Dn Dn 0.5 -600 1.92 V mA Power Supply Current -- -- 12 -- -- 12 -- 8.0 12 -- -- 12 NOTES: 1. VCC_VBB = 3.3V is only required for single-ended LVPECL input. For differential LVPECL input, VCC_VBB can be either 3.3V or 5V. 2. These levels are for VCC_VBB = 3.3V. Level specifications will vary 1:1 with VCC_VBB. 2 Micrel SY100EL92 PECL OUTPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = +3.0V to +3.8V; VCC = VCCO = +4.5V to +5.5V TA = -40C Symbol VCCO VOH VOL ICCO Parameter Power Supply Voltage Output HIGH Voltage(1) Output LOW Voltage(1) Min. 4.5 3.915 3.170 TA = 0C Min. Typ. 4.5 3.975 3.190 TA = +25C Max. 5.5 4.120 3.380 TA = +85C Min. 4.5 3.975 3.190 Typ. -- -- -- Max. 5.5 4.120 3.445 Min. 4.5 3.975 3.190 Typ. -- -- -- Max. 5.5 4.120 3.380 Typ. -- -- -- Max. 5.5 4.120 3.380 Unit V V V -- -- -- Power Supply Current -- -- 20 -- -- 20 -- 15 20 -- -- 21 mA NOTE: 1. These levels are for VCCO = 5.0V. Level specifications will vary 1:1 with VCCO. AC ELECTRICAL CHARACTERISTICS(1) TA = -40C Symbol tPLH tPHL tskew Parameter Propagation Delay D to Q Within-Device Skew Output-to-Output(2) Part-to-Part (Diff.)(2) Duty Cycle (Diff.)(3) Minimum Input Swing(4) Common Mode VPP < 500mV VPP 500mV Output Rise/Fall Times Q (20% to 80%) Range(5) Diff. S.E. Min. Typ. 430 410 -- -- -- 150 1.3 1.5 320 520 540 20 20 25 -- -- -- -- Max. 630 710 100 200 -- -- VCC-0.2 VCC-0.2 TA = 0C Min. 430 410 -- -- -- 150 1.2 1.4 320 Typ. 520 540 20 20 25 -- -- -- -- Max. 630 710 100 200 -- -- VCC-0.2 VCC-0.2 TA = +25C Min. 430 410 -- -- -- 150 1.2 1.4 320 Typ. 520 540 20 20 25 -- -- -- -- Max. 630 710 100 200 -- -- VCC-0.2 VCC-0.2 TA = +85C Min. 430 410 -- -- -- 150 1.2 1.4 320 Typ. 520 540 20 20 25 -- -- -- -- Max. Unit 630 710 100 200 -- -- VCC-0.2 VCC-0.2 ps ps VPP VCMR mV V tr tf 580 580 580 580 ps NOTES: 1. Power supply requirements applies as indicated in the DC electrical characteristics tables. 2. Skew is measured between outputs under identical transitions. 3. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device Common Mode Range. 4. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ~40. 5. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP min. and 1V. PRODUCT ORDERING CODE Ordering Code SY100EL92ZC SY100EL92ZCTR Package Type Z20-1 Z20-1 Operating Range Commercial Commercial 3 Micrel SY100EL92 20 LEAD SOIC .300" WIDE (Z20-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 4 |
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